AIST > RCIS > News > First Cryptographic Hardware Validated by JCMVP

17 Dec 2007: First Cryptographic Hardware Validated by JCMVP

Improves the security of cryptographic products and contributes toward international standardization procedures

[translation posted 27DEC07]

Akashi Satoh (Senior Research Scientist), the Research Team for Physical Analysis (Leader: Kentaro Imafuku), the Research Center for Information Security (Director: Hideki Imai) of the National Institute of Advanced Industrial Science and Technology (AIST) (President: Hiroyuki Yoshikawa), and Takafumi Aoki (Professor) and Naofumi Honma (Assistant Professor) of the Graduate School of Information Sciences, Tohoku University (President: Akihisa Inoue) have jointly developed an FPGA board integrated with a cryptographic function.

The newly developed FPGA board was validated by the Japan Cryptographic Module Validation Program (JCMVP), which is managed by the Information-Technology Promotion Agency, Japan (IPA), as the first cryptographic hardware module. (December 17, 2007) The cryptographic FPGA board with the international standard cipher algorithm Advanced Encryption Standard has obtained a certificate for level-1 security.

AIST will distribute the newly developed FPGA board as the standard board for testing to domestic and international universities and research institutes free of charge in order to establish a new security testing and metrics for cryptographic modules. AIST will also release the detailed design specifications and source codes of the board on a website as the design guidelines for cryptographic hardware. These measures will promote cryptographic products evaluated by third parties, and will contribute to improve security of entire information systems and products.

For more details, please see the following: