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24 Jun 2009: SASEBO (Side-channel Attack Standard Evaluation BOard) to be delivered to market
[Published 24/JUN/2009]
SASEBO (Side-channel Attack Standard Evaluation BOard), which was developed by the Research Team for Hardware Security [Team Leader: Akashi Satoh], Research Center for Information Security [Director: Hideki Imai] of the National Institute of Advanced Industrial Science and Technology [President: Tamotsu Nomakuchi] (hereafter referred to as ¡ÈAIST¡É), together with Professor Takafumi Aoki and Associate Professor Naofumi Honma of the Graduate School of Information Science, Tohoku University [President: Akihisa Inoue] in an undertake project sponsored by the Ministry of Economy, Industry, and Trade, Japan is to be commercialized through Toppan Printing Co., Ltd. [President and CEO: Naoki Adachi] and Cryptography Research, Inc. [President: Paul Kocher] (hereafter referred to as ¡ÈCRI¡É).
SASEBO is an FPGA (Field Programmable Gate Array) board designed to contribute to the establishment of security evaluation standard of cryptographic module, and has been distributed to various domestic and international research organizations as a standard platform for side-channel attack experiments.
So far, we have distributed SASEBO exclusively to research organizations that have credentials in the field. However, due to the requests from companies and universities for SASEBO to be used in product development and educational purposes, we have decided to place it on the market.
On this occasion, two kinds of FPGA boards will be marketed through Toppan Printing Co., Ltd.: SASEBO-G and SASEBO-B which use Xilinx® and ALTERA® FPGAs, respectively. CRI integrated SASEBO-G to their DPA Workstation™ to evaluate security of cryptographic hardware on the FPGA.
AIST is also developing new evaluation boards using leading-edge devices and various tools, and, by placing these for the advancement of the research area, will continue to contribute toward the safety enhancement for the overall information security products.