Notice: RCIS was reformed into RISEC on April 1, 2012.
It has been further merged into new Information Technology Research Institute on April 1, 2015.

SHA-3 hardware project

SHA-3 Hardware Project

Hardware performances of the SHA-3 candidates were evaluated by using an FPGA on SASEBO-GII and an ASIC library. Hardware macros for the comprehensive evaluation were designed with straightforward architectures. The hardware macros for BLAKE, CubeHash, ECHO, Grostl, Hamsi, Luffa, Shabal, Skein were designed by Ohta-Sakiyama Lab., University of elector comunications. The macros for BMW, Fugue, SIMD were provided from Electrical and Computer Engineering Dept. Virginia Polytechnic Institute and State University Blacksburg. Those for JH, SHAvite-3 were designed by Katholieke Universiteit Leuven (COSIC). The source coeds can be used freely for research purposes. For the Keccak implementation, a VHDL source code from the Keccak Website was used.

Control Software

  • C# source code and binary
  • Program window image (Japanese)
  • Control FPGA (Spartan-3A xc3s50a)

  • Verilog-HDL source code
  • Circuit block diagram
  • Cryptographic FPGA (Virtex-5 xc5vlx30)


    AlgorithmCodeBlock
    Size
    [bits]
    SpeedSize
    Max Freq
    [MHz]
    Clock Cycles Throughput
    [Mbps]
    (Long Msg)
    Latency [us]
    (Short Msg)
    1024 bits
    Slices Registers LUTs
    Core Core
    +I/F
    Core Core
    +I/F
    Core Core
    +I/F
    SHA-256source / binary 512260681481,9588990.7851.896091,2242,045
    BLAKEsource / binary 512115221212,6764870.5743.571,6601,3935,154
    BMWsource / binary 512342988,7041780.23510.124,5301,31715,012
    CubeHashsource / binary 25618516642,9607401.2972.855901,3162,182
    ECHOsource / binary 1,536149994072,3125620.6643.052,8274,1989,885
    Fuguesource / binary 3278281,2483121.3214.4740131,04313,255
    Grøstlsource / binary 512154101067,8857440.2602.442,6161,57010,088
    Hamsisource / binary 322104101,6806720.6901.927188412,499
    JHsource / binary 512201391352,6397620.5822.252,66116128,392
    Keccaksource / binary 1,024205242168,3979670.2442.351,4332,6664,806
    Luffasource / binary 2562619577,4241,1720.2071.311,0481,4463,754
    Shabalsource / binary 512228501432,3358161.3162.751,2512,0614,219
    SHAvite-3source / binary 512251381433,3829590.4541.791,0631,3633,564
    SIMDsource / binary 51275461428352701.8406.323,9876,69313,908
    Skeinsource / binary 25611521751,4023930.9043.208549292,864

    ASIC Implementations (STMicro 90-nm Standard Cell Library)


    Algorithm Code Synthesized
    Module
    Block
    Size
    [bits]
    Speed Size
    [Gates]
    Hardware
    Efficiency
    [Kbps/gate]
    Max Freq
    [MHz]
    Clock
    Cycles
    Throughput
    [Mbps]
    SHA-256 source SHA256_CORE 512 735.3
    355.9
    116.6
    68 5,536
    2,680
    878
    18,677
    13,199
    11,332
    290.6
    203.0
    77.4
    BLAKE source BLAKE_CORE 512 286.5
    260.4
    146.6
    22 6,668
    6,061
    3,412
    36,994
    30,292
    23,214
    180.5
    200.1
    147.0
    BMW source bmw256 512 101.3
    84.4
    67.4
    2 25,937
    21,603
    17,262
    128,655
    115,001
    105,566
    201.6
    187.9
    163.5
    CubeHash source CubeHash_CORE 256 515.5
    352.1
    171.8
    16 8,247
    5,834
    2,749
    35,548
    21,336
    16,320
    232.0
    264.1
    168.5
    ECHO source ECHO_CORE 1,536 362.3
    260.4
    146.8
    99 5,621
    4,040
    2,278
    101,068
    97,803
    57,834
    55.6
    59.6
    39.4
    Fugue source fugue256 32 170.1
    113.0
    77.8
    2 2,721
    1,808
    1,245
    56,734
    45,553
    46,683
    48.0
    37.9
    26.7
    Grøstl source GROESTL_CORE 512 337.8
    257.7
    127.9
    10 17,297
    13,196
    6,547
    139,113
    86,191
    56,665
    124.3
    153.1
    115.5
    Hamsi source HAMSHI_CORE 32 970.9
    543.5
    352.1
    4 7,767
    4,348
    2,817
    67,582
    36,981
    32,116
    114.9
    117.6
    87.7
    JH source crypto_fpga 512 763.4
    694.4
    353.4
    39 10,022
    9.117
    4,639
    54,594
    42,775
    31,864
    183.6
    213.1
    145.6
    Keccak source keccak 1,024 781.3
    540.5
    354.6
    24 33,333
    23,063
    15,130
    50,675
    33,664
    29,548
    657.8
    685.1
    512.0
    Luffa source LUFFA_CORE 256 1,010.1
    537.6
    262.5
    9 28,732
    15,293
    7,466
    39,642
    19,797
    19,359
    724.8
    772.5
    385.6
    Shabal source SHABAL_CORE 512 591.7
    543.5
    350.9
    50 6,059
    5,565
    3,593
    34,642
    30,328
    27,752
    174.9
    183.5
    129.5
    SHAvite-3 source Shavite_top 512 625.0
    492.6
    206.6
    38 8,421
    6,637
    2,784
    59,390
    42,036
    33,875
    141.8
    157.9
    82.2
    SIMD source simd256 512 284.9
    261.1
    113.1
    46 3,171
    2,06
    1,259
    138.980
    122,118
    88,947
    22.8
    23.8
    14.2
    Skein source SKEIN_CORE 256 270.3
    207.0
    146.2
    21 3,295
    2,524
    1,782
    43,132
    28,782
    22,562
    76.4
    87.7
    79.0

    Various ASIC Implementations (STMicro 90-nm Standard Cell Library)

    Various hardware implementations designed by AIST and Tohoku University are shown below. These codes can also be used for academic research use.
    Algorithm Code Synthesized
    Module
    Block
    Size
    [bits]
    S-box Speed Size
    [Gates]
    Hardware
    Efficiency
    [Kbps/gate]
    Max Freq
    [MHz]
    Clock
    Cycles
    Throughput
    [Mbps]
    SHA-256 source SHA256 512 505.1
    349.7
    209.2
    72 3,592
    2,486
    1,488
    15,574
    9,563
    8,230
    230.6
    260.0
    180.8
    Grøstl
    (Normal)
    source GROESTL_256 512 348.4
    261.8
    101.6
    11 84,053
    46,256
    34,783
    8,945
    6,382
    2,478
    101.1
    138.0
    71.2
    Grøstl
    (Compact)
    source GROESTL_256 512 349.7
    260.4
    113.1
    21 120,812
    70,953
    57,908
    16,275
    12,121
    5,265
    134.7
    170.8
    90.9
    Keccak source keccak 1,024 1,0309
    552.5
    355.91
    24 43,986
    23,573
    15,184
    55,900
    26,501
    25,167
    786.9
    889.5
    603.3
    Luffa

    (High-Speed)
    source Luffa 256 Bit
    Slice
    625.0
    552.5
    357.1
    5 32,000
    28,287
    18,286
    60,856
    44,290
    31,201
    525.8
    638.7
    586.1
    Table 684.9
    549.5
    350.9
    35,069
    28,132
    17,965
    62,838
    38,274
    29,336
    558.1
    735.0
    612.4
    Luffa

    (Normal)
    source Luffa Bit
    Slice
    1,000.0
    552.5
    357.1
    9 28,444
    15,715
    10,159
    39,394
    19,736
    18,907
    722.0
    796.3
    537.3
    Table 1,087.0
    549.5
    355.9
    31,258
    15,629
    10,123
    39,513
    19,604
    18,933
    791.1
    797.2
    534.7
    Luffa

    (Compact 1)
    source Luffa Bit
    Slice
    757.6
    546.6
    355.9
    25 7,758
    5,596
    3,641
    25,558
    17,477
    14,710
    303.5
    320.2
    247.7
    Table 862.5
    555.6
    355.9
    8,463
    5,689
    3,644
    26,373
    16,467
    14,817
    320.9
    345.5
    245.9
    Luffa

    (Compact 2)
    source Luffa Bit
    Slice
    813.0
    552.5
    358.4
    129 1,613
    1,096
    711
    24,285
    16,801
    15,381
    66.4
    65.3
    46.2
    Table 813.0
    555.6
    358.4
    1,613
    1,103
    811
    22,500
    16,633
    15,383
    71.7
    66.3
    46.2

    Reference